1. Logic minimization algorithms for VLSI synthesis
Author:
Library: Central Library of Sharif University of Technology (Tehran)
Subject: ، Logic design,، Integrated circuits-- Very large scale integration,، Integrated circuits-- Design and construction-- Data processing,، Algorithms
Classification :
TK
7868
.
L6
.
L626
1984
2. Logic minimization algorithms for vlsi synthesis
Author: By Robert K. Brayton ... [et al.]&
Library: Central Library and Information Center of Shahed University (Tehran)
Subject: Logic design,Integrated circuits- Very large scale integration,Integrated circuits- Design and construction- Data processing,Algorithms
Classification :
TK
،
7868
،.
L6
,
E78
،
1984
